CommentStreams:129c04e802686c310154df504b1d4b09

dmesg shows:

[ 0.394368] brcm-pcie 1000110000.pcie: host bridge /axi/pcie@110000 ranges: [ 0.394376] brcm-pcie 1000110000.pcie: No bus range found for /axi/pcie@110000, using [bus 00-ff] [ 0.394387] brcm-pcie 1000110000.pcie: MEM 0x1b00000000..0x1bfffffffb -> 0x0000000000 [ 0.394392] brcm-pcie 1000110000.pcie: MEM 0x1800000000..0x1affffffff -> 0x0400000000 [ 0.394398] brcm-pcie 1000110000.pcie: IB MEM 0x0000000000..0x0fffffffff -> 0x1000000000 [ 0.395575] brcm-pcie 1000110000.pcie: setting SCB_ACCESS_EN, READ_UR_MODE, MAX_BURST_SIZE [ 0.395581] brcm-pcie 1000110000.pcie: Forcing gen 2 [ 0.395618] brcm-pcie 1000110000.pcie: PCI host bridge to bus 0000:00 [ 0.395620] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.395624] pci_bus 0000:00: root bus resource [mem 0x1b00000000-0x1bfffffffb] (bus address [0x00000000-0xfffffffb]) [ 0.395627] pci_bus 0000:00: root bus resource [mem 0x1800000000-0x1affffffff pref] (bus address [0x400000000-0x6ffffffff]) [ 0.395638] pci 0000:00:00.0: [14e4:2712] type 01 class 0x060400 [ 0.395665] pci 0000:00:00.0: PME# supported from D0 D3hot [ 0.396636] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.823818] brcm-pcie 1000110000.pcie: link down [ 0.828504] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.828512] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.828518] pci 0000:00:00.0: Max Payload Size set to 512/ 512 (was 128), Max Read Rq 512 [ 0.828618] pcieport 0000:00:00.0: PME: Signaling with IRQ 38 [ 0.828679] pcieport 0000:00:00.0: AER: enabled with IRQ 38 [ 0.828781] pci_bus 0000:01: busn_res: [bus 01] is released [ 0.828832] pci_bus 0000:00: busn_res: [bus 00-ff] is released [ 0.828956] brcm-pcie 1000120000.pcie: host bridge /axi/pcie@120000 ranges: [ 0.828960] brcm-pcie 1000120000.pcie: No bus range found for /axi/pcie@120000, using [bus 00-ff] [ 0.828969] brcm-pcie 1000120000.pcie: MEM 0x1f00000000..0x1ffffffffb -> 0x0000000000 [ 0.828974] brcm-pcie 1000120000.pcie: MEM 0x1c00000000..0x1effffffff -> 0x0400000000 [ 0.828982] brcm-pcie 1000120000.pcie: IB MEM 0x1f00000000..0x1f003fffff -> 0x0000000000 [ 0.828986] brcm-pcie 1000120000.pcie: IB MEM 0x0000000000..0x0fffffffff -> 0x1000000000 [ 0.830155] brcm-pcie 1000120000.pcie: setting SCB_ACCESS_EN, READ_UR_MODE, MAX_BURST_SIZE [ 0.830163] brcm-pcie 1000120000.pcie: Forcing gen 2 [ 0.830193] brcm-pcie 1000120000.pcie: PCI host bridge to bus 0001:00 [ 0.830196] pci_bus 0001:00: root bus resource [bus 00-ff] [ 0.830199] pci_bus 0001:00: root bus resource [mem 0x1f00000000-0x1ffffffffb] (bus address [0x00000000-0xfffffffb]) [ 0.830202] pci_bus 0001:00: root bus resource [mem 0x1c00000000-0x1effffffff pref] (bus address [0x400000000-0x6ffffffff]) [ 0.830211] pci 0001:00:00.0: [14e4:2712] type 01 class 0x060400 [ 0.830233] pci 0001:00:00.0: PME# supported from D0 D3hot [ 0.831076] pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.935820] brcm-pcie 1000120000.pcie: link up, 5.0 GT/s PCIe x4 (!SSC) [ 0.935839] pci 0001:01:00.0: [1de4:0001] type 00 class 0x020000 [ 0.935853] pci 0001:01:00.0: reg 0x10: [mem 0xffffc000-0xffffffff] [ 0.935861] pci 0001:01:00.0: reg 0x14: [mem 0xffc00000-0xffffffff] [ 0.935868] pci 0001:01:00.0: reg 0x18: [mem 0xffff0000-0xffffffff] [ 0.935938] pci 0001:01:00.0: supports D1 [ 0.935940] pci 0001:01:00.0: PME# supported from D0 D1 D3hot D3cold [ 0.947828] pci_bus 0001:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.947836] pci 0001:00:00.0: BAR 8: assigned [mem 0x1f00000000-0x1f005fffff] [ 0.947840] pci 0001:01:00.0: BAR 1: assigned [mem 0x1f00000000-0x1f003fffff] [ 0.947845] pci 0001:01:00.0: BAR 2: assigned [mem 0x1f00400000-0x1f0040ffff] [ 0.947850] pci 0001:01:00.0: BAR 0: assigned [mem 0x1f00410000-0x1f00413fff] [ 0.947855] pci 0001:00:00.0: PCI bridge to [bus 01] [ 0.947858] pci 0001:00:00.0: bridge window [mem 0x1f00000000-0x1f005fffff] [ 0.947862] pci 0001:00:00.0: Max Payload Size set to 256/ 512 (was 128), Max Read Rq 512 [ 0.947871] pci 0001:01:00.0: Max Payload Size set to 256/ 256 (was 128), Max Read Rq 512 [ 0.947923] pcieport 0001:00:00.0: enabling device (0000 -> 0002) [ 0.947952] pcieport 0001:00:00.0: PME: Signaling with IRQ 39 [ 0.948001] pcieport 0001:00:00.0: AER: enabled with IRQ 39 [ 0.948071] rp1 0001:01:00.0: bar0 len 0x4000, start 0x1f00410000, end 0x1f00413fff, flags, 0x40200