RGB2HD04: Difference between revisions
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# '''50PIN FFC Input Connector''': Supports RGB888 (24bit). | # '''50PIN FFC Input Connector''': Supports RGB888 (24bit). | ||
# '''30P Pin connector'''(15x2 2.0mm connectors to be prepared and soldered by yourself): Supports RGB888 (24bit) and 6bit input. | # '''30P Pin connector'''(15x2 2.0mm connectors to be prepared and soldered by yourself): Supports RGB888 (24bit) and 6bit input. | ||
* '''Audio Integration''': Provides digital audio I2S inputs to support simultaneous transmission of audio signals to HDMI outputs | * '''Audio Integration''': Provides digital audio I2S inputs to support simultaneous transmission of audio signals to HDMI outputs; '''24‑bit 48 kHz''' I2S audio input via CN5 I2S, converting digital RGB signals to HDMI with integrated audio support | ||
* '''Dimensional clarity''': Provides accurate mechanical mounting dimensions for easy integration into your equipment enclosure. | * '''Dimensional clarity''': Provides accurate mechanical mounting dimensions for easy integration into your equipment enclosure. | ||
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* 1 x 50PIN FFC cable (length 5 cm) | * 1 x 50PIN FFC cable (length 5 cm) | ||
[[File: IMG-9513-1.jpg|700px]] | [[File: IMG-9513-1.jpg|700px]] | ||
==User Manual== | |||
*English User Manual: [[File:RGB2HD04-RGB-to-HDMI-EN.pdf]] | |||
*Chinese User Manual: [[File:RGB2HD04-RGB转HDMI-CN.pdf]] | |||
==FAQ== | ==FAQ== | ||
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A: This board supports resolutions that require a pixel clock greater than 25 MHz. Lower-resolution displays such as 480 × 272 are not supported, as their pixel clock does not meet the minimum requirement. | A: This board supports resolutions that require a pixel clock greater than 25 MHz. Lower-resolution displays such as 480 × 272 are not supported, as their pixel clock does not meet the minimum requirement. | ||
Typical supported resolutions include (but are not limited to): | |||
* 800 × 480 | |||
* 1024 × 600 | |||
* 1280 × 720 (720p) | |||
* 1920 × 1080 (1080p) | |||
* Any other resolution whose total pixel timing results in a pixel clock > 25 MHz | |||
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Q2: What is the power supply voltage to input to AVDD on CN2? | |||
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A: The AVDD pin voltage range is 6V-12V. The pin receives power when connected to the display (or the upstream industrial control board). | |||
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